Queue Simulation Using Dynamically Reconfigurable Fpgas

Many complex telecommunication and computer networks can be successfully modelled as networks of queues for the purpose of performance evaluation. Simulators for such systems are typically programmed on von Neumann computers using the techniques of discrete event simulation. As the complexity of the systems being modelled increases, software simulators are less capable of providing acceptable solutions. The principal problems are that frequently too much time is needed to produce sufficiently accurate performance measures and that the complexity of the simulation software has led to difficulties in the design, maintenance and extension of the models. The need for fast execution of large simulation models has resulted in much research into the design of parallel, discrete event simulators [1,2]. Despite this effort, the apparent solution of employing networks of parallel computers has not been able to offer adequate speed improvements. For larger systems especially, reductions in execution time do not correlate favourably with increases in the degree of parallelism employed in the simulator. Meanwhile highly parallel systems have exacerbated the problems related to the complexity of the simulation software.